As for the second part of your question, the property fast-back-to-back will appear in a PCI device's standard PCI properties if its PCI Configuration space Status register's fast-back-to-back-capable bit is asserted. If all devices on a PCI Bus have this property (i.e., are fast-back-to-back-capable), the system software will enable all devices fast-back-to-back-enable bits in their PCI Configuration space Command registers. That is all the property fast-back-to-back is used for.
Again, the PCI bridge chip on the PCI PowerMacs will not generate fast back to back cycles, but other masters in the system could, so your device should be able to respond to them correctly. In fact, it is a requirement from the PCI Compliance Checklist that you respond correctly to fast-back-to-back cycles. The PCI Compliance Checklist is available from the PCI SIG.